Overview
Coral System-on-Module (SoM) - 4GB RAM Version is a Google Coral Edge TPU device sold by Seeed Studio, rated by Seeed at 4 TOPS. Its GPU is NXP i.MX 8M SoC Quad-core ARM Cortex-A53, plus Cortex-M4F 2D/3D Vivante GC7000 Lite GPU and VPU. Seeed publishes a fixed price for this configuration.
Key Features
- Coral System-on-Module (SoM) - 4GB RAM Version rated at 4 TOPS
- Arm Cortex-A53 MPCore platform: Quad symmetric Cortex-A53 processors: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Support L1 cache RAMs protection w
- Arm Cortex-M4 core platform: 16 KB L1 Instruction Cache 16 KB L1 Data Cache 256 KB tightly coupled memory (TCM)
- I/O connectivity: 2x USB 3.0/2.0 controllers with integrated PHY interfaces 1x Ultra Secure Digital Host Controller (uSDHC) interfaces 1x
- On-chip memory: Boot ROM (128 KB) On-chip RAM (128 KB + 32 KB)
- External memory: 32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600 8-bit NAND-Flash eMMC 5.0 Flash SPI NOR Flash QuadSPI Flash
Ideal For
developers running quantised TensorFlow Lite models at the edge on an Edge TPU rather than a GPU
Feature
Details
Arm Cortex-A53 MPCore platform
Quad symmetric Cortex-A53 processors: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture: 1 MB unified L2 cache Support L2 cache RAMs protection with ECC Frequency of 1.5 GHz
Arm Cortex-M4 core platform
16 KB L1 Instruction Cache 16 KB L1 Data Cache 256 KB tightly coupled memory (TCM)
Graphic Processing Unit (GPU)
Vivante GC7000Lite 4 shaders 267 million triangles/sec 1.6 Gigapixel/sec 32 GFLOPs 32-bit or 64 GFLOPs 16-bit Supports OpenGL ES 1.1, 2.0, 3.0, 3.1, Open CL 1.2, and Vulkan
Video Processing Unit (VPU)
4Kp60 HEVC/H.265 main, and main 10 decoder 4Kp60 VP9 and 4Kp30 AVC/H.264 decoder (requires full system resources) 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder
I/O connectivity
2x USB 3.0/2.0 controllers with integrated PHY interfaces 1x Ultra Secure Digital Host Controller (uSDHC) interfaces 1x Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588 2x UART modules 2x I2C modules 2x SPI modules 16x GPIO lines with interrupt capability 4x PWM lines Input/output multiplexing controller (IOMUXC) to provide centralized pad control Note: The list above is the number of signals available to the baseboard (after considering SoC signals used by the SoM).
On-chip memory
Boot ROM (128 KB) On-chip RAM (128 KB + 32 KB)
External memory
32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600 8-bit NAND-Flash eMMC 5.0 Flash SPI NOR Flash QuadSPI Flash with support for XIP
Display
HDMI Display Interface: HDMI 2.0a supporting one display up to 1080p Upscale and downscale between 4K and HD video (requires full system resources) 20+ Audio interfaces 32-bit @ 384 kHz fs, with Time Division Multiplexing (TDM) support SPDIF input and output Audio Return Channel (ARC) on HDMI MIPI-DSI Display Interface: MIPI-DSI 4 channels supporting one display, resolution up to 1920 x 1080 at 60 Hz LCDIF display controller Output can be LCDIF output or DC display controller output
Audio
1x SPDIF input and output 2x synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and codec/DSP interfaces 1x SAI for 8 Tx channels for HDMI output audio 1x SPDIF input for HDMI ARC input
Camera
2x MIPI-CSI2 camera inputs (4-lane each)
Security
Resource Domain Controller (RDC) supports four domains and up to eight regions Arm TrustZone (TZ) architecture On-chip RAM (OCRAM) secure region protection using OCRAM controller High Assurance Boot (HAB) Cryptographic acceleration and assurance (CAAM) module Secure non-volatile storage (SNVS): Secure real-time clock (RTC) Secure JTAG controller (SJC)
Edge TPU coprocessor
ASIC designed by Google that provides high-performance ML inferencing for TensorFlow Lite models Uses PCIe and I2C/GPIO to interface with the iMX8M SoC 4 trillion operations per second (TOPS) 2 TOPS per watt
Random-access memory (SDRAM)
4 GB LPDDR4 SDRAM (4-channel, 32-bit bus width) 1600 MHz maximum DDR clock Interfaces directly to the iMX8M build-in DDR controller
Flash memory (eMMC)
8 GB NAND eMMC flash memory 8-bits MMC mode Conforms to JEDEC version 5.0 and 5.1
Expandable flash (MicroSD)
Meets SD/SDIO 3.0 standard Runs at 4-bits SDIO mode Supports system boot from SD card
Ethernet
10/100/1000 Mbps Ethernet/IEEE 802.3 networks Reduced gigabit media-independent interface (RGMII)
Wi-Fi
Murata LBEE5U91CQ module: Wi-Fi 2x2 MIMO (802.11a/b/g/n/ac 2.4/5 GHz) Supports PCIe host interface for W-LAN
Bluetooth
Murata LBEE5U91CQ module: Bluetooth 4.2 (supports Bluetooth low-energy) Supports UART interface
Cryptographic coprocessor
Microchip ATECC608A cryptographic coprocessor: Asymmetric (public/private) key cryptographic signature solution based on Elliptic Curve Cryptography and ECDSA signature protocols
Baseboard connectors
3x 100-pin connectors (Hirose DF40C-100DP-0.4V)
Antenna connectors
2x coaxial cable connectors (Murata MM8930-2600)
Provides a complete system
The Coral SoM is a fully-integrated Linux system that includes NXP's iMX8M system-on-chip (SoC), eMMC memory, LPDDR4 RAM, Wi-Fi, and Bluetooth, and the Edge TPU coprocessor for ML acceleration. It runs a derivative of Debian Linux we call Mendel.
Performs high-speed ML inferencing
The onboard Edge TPU coprocessor is capable of performing 4 trillion operations (tera-operations) per second (TOPS), using 0.5 watts for each TOPS (2 TOPS per watt). For example, it can execute state-of-the-art mobile vision models such as MobileNet v2 at 400 FPS, in a power-efficient manner.
Integrates with your custom hardware
The SoM connects to your own baseboard hardware with three 100-pin connectors.
Supports TensorFlow Lite
No need to build models from the ground up. TensorFlow Lite models can be compiled to run on the Edge TPU.
Supports AutoML Vision Edge
Easily build and deploy fast, high-accuracy custom image classification models to your device with AutoML Vision Edge.
Feature
High-speed and low-power ML inferencing (4 TOPS @2 W)
Feature
A complete Linux system (running Mendel, a Debian derivative)
Feature
Small footprint (40 x 48 mm)
Feature
NXP i.MX 8M SoC Quad-core ARM Cortex-A53, plus Cortex-M4F 2D/3D Vivante GC7000 Lite GPU and VPU
Feature
Quad-core ARM Cortex-A53, plus Cortex-M4F
Feature
2D/3D Vivante GC7000 Lite GPU and VPU
Feature
Google Edge TPU ML accelerator
Feature
Cryptographic coprocessor
Feature
Wi-Fi 2x2 MIMO (802.11b/g/n/ac 2.4/5 GHz)
Feature
Bluetooth 4.2
Feature
Gigabit Ethernet
Feature
HDMI and MIPI-DSI
Feature
Up to 95x GPIO (including SPI, I2C, PWM, UART, SAI, and SDIO)
Feature
32 KB L1 Instruction Cache
Feature
32 KB L1 Data Cache
Feature
Support L1 cache RAMs protection with parity/ECC
Feature
1 MB unified L2 cache
Feature
Support L2 cache RAMs protection with ECC
Feature
Frequency of 1.5 GHz
Feature
16 KB L1 Instruction Cache
Feature
16 KB L1 Data Cache
Feature
256 KB tightly coupled memory (TCM)
Feature
Vivante GC7000Lite
Feature
267 million triangles/sec
Feature
1.6 Gigapixel/sec
Feature
32 GFLOPs 32-bit or 64 GFLOPs 16-bit
Feature
Supports OpenGL ES 1.1, 2.0, 3.0, 3.1, Open CL 1.2, and Vulkan
Feature
4Kp60 HEVC/H.265 main, and main 10 decoder
Feature
4Kp60 VP9 and 4Kp30 AVC/H.264 decoder (requires full system resources)
Feature
1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder
Feature
2x USB 3.0/2.0 controllers with integrated PHY interfaces
Feature
1x Ultra Secure Digital Host Controller (uSDHC) interfaces
Feature
1x Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588
Feature
2x UART modules
Feature
2x I2C modules
Feature
2x SPI modules
Feature
16x GPIO lines with interrupt capability
Feature
4x PWM lines
Feature
Input/output multiplexing controller (IOMUXC) to provide centralized pad control
Feature
Boot ROM (128 KB)
Feature
On-chip RAM (128 KB + 32 KB)
32/16-bit DRAM interface
LPDDR4-3200, DDR4-2400, DDR3L-1600
Feature
8-bit NAND-Flash
Feature
eMMC 5.0 Flash
Feature
SPI NOR Flash
Feature
QuadSPI Flash with support for XIP
Feature
HDMI 2.0a supporting one display up to 1080p
Feature
Upscale and downscale between 4K and HD video (requires full system resources)
Feature
20+ Audio interfaces 32-bit @ 384 kHz fs, with Time Division Multiplexing (TDM) support
Feature
SPDIF input and output
Feature
Audio Return Channel (ARC) on HDMI
Feature
MIPI-DSI 4 channels supporting one display, resolution up to 1920 x 1080 at 60 Hz
Feature
LCDIF display controller
Feature
Output can be LCDIF output or DC display controller output
Feature
1x SPDIF input and output
Feature
2x synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and codec/DSP interfaces
Feature
1x SAI for 8 Tx channels for HDMI output audio
Feature
1x SPDIF input for HDMI ARC input
Feature
2x MIPI-CSI2 camera inputs (4-lane each)
Feature
Resource Domain Controller (RDC) supports four domains and up to eight regions
Feature
Arm TrustZone (TZ) architecture
Feature
On-chip RAM (OCRAM) secure region protection using OCRAM controller
Feature
High Assurance Boot (HAB)
Feature
Cryptographic acceleration and assurance (CAAM) module
Secure non-volatile storage (SNVS)
Secure real-time clock (RTC)
Feature
Secure JTAG controller (SJC)
Feature
ASIC designed by Google that provides high-performance ML inferencing for TensorFlow Lite models
Feature
Uses PCIe and I2C/GPIO to interface with the iMX8M SoC
Feature
4 trillion operations per second (TOPS)
Feature
2 TOPS per watt
Feature
4 GB LPDDR4 SDRAM (4-channel, 32-bit bus width)
Feature
1600 MHz maximum DDR clock
Feature
Interfaces directly to the iMX8M build-in DDR controller
Feature
8 GB NAND eMMC flash memory
Feature
8-bits MMC mode
Feature
Conforms to JEDEC version 5.0 and 5.1
Feature
Meets SD/SDIO 3.0 standard
Feature
Runs at 4-bits SDIO mode
Feature
Supports system boot from SD card
Feature
10/100/1000 Mbps Ethernet/IEEE 802.3 networks
Feature
Reduced gigabit media-independent interface (RGMII)
Feature
Wi-Fi 2x2 MIMO (802.11a/b/g/n/ac 2.4/5 GHz)
Feature
Supports PCIe host interface for W-LAN
Feature
Bluetooth 4.2 (supports Bluetooth low-energy)
Feature
Supports UART interface
Feature
Asymmetric (public/private) key cryptographic signature solution based on Elliptic Curve Cryptography and ECDSA signature protocols
Prices may vary. Verify on vendor site.
Quick Specs
- Feature
- Asymmetric (public/private) key cryptographic signature solution based on Elliptic Curve Cryptography and ECDSA signature protocols
- Arm Cortex-A53 MPCore platform
- Quad symmetric Cortex-A53 processors: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture: 1 MB unified L2 cache Support L2 cache RAMs protection with ECC Frequency of 1.5 GHz
- Arm Cortex-M4 core platform
- 16 KB L1 Instruction Cache 16 KB L1 Data Cache 256 KB tightly coupled memory (TCM)
- Graphic Processing Unit (GPU)
- Vivante GC7000Lite 4 shaders 267 million triangles/sec 1.6 Gigapixel/sec 32 GFLOPs 32-bit or 64 GFLOPs 16-bit Supports OpenGL ES 1.1, 2.0, 3.0, 3.1, Open CL 1.2, and Vulkan
- Video Processing Unit (VPU)
- 4Kp60 HEVC/H.265 main, and main 10 decoder 4Kp60 VP9 and 4Kp30 AVC/H.264 decoder (requires full system resources) 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder
- I/O connectivity
- 2x USB 3.0/2.0 controllers with integrated PHY interfaces 1x Ultra Secure Digital Host Controller (uSDHC) interfaces 1x Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588 2x UART modules 2x I2C modules 2x SPI modules 16x GPIO lines with interrupt capability 4x PWM lines Input/output multiplexing controller (IOMUXC) to provide centralized pad control Note: The list above is the number of signals available to the baseboard (after considering SoC signals used by the SoM).